Since the invention of the integrated circuit (IC), the semiconductor industry has experienced sustained rapid growth due to continuous improvements in the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area.
These integration improvements are essentially two-dimensional (2D) in nature, in that the volume occupied by the integrated components is essentially on the surface of the semiconductor wafer. Although dramatic improvement in lithography has resulted in considerable improvement in 2D integrated circuit formation, there are physical limits to the density that can be achieved in two dimensions. One of these limits is the minimum size needed to make these components. Also, when more devices are put into one chip, more complex designs are required.
In an attempt to further increase circuit density, three-dimensional (3D) ICs have been investigated. In a typical formation process of a 3D IC, two dies are bonded together and electrical connections are formed between each die and contact pads on a substrate. For example, one attempt involved bonding two dies on top of each other. The stacked dies were then bonded to a carrier substrate and wire bonds electrically coupled contact pads on each die to contact pads on the carrier substrate. This attempt, however, requires a carrier substrate larger than the dies for the wire bonding.
More recent attempts have focused on through-silicon vias (TSVs). Generally, TSVs are formed by etching a vertical via through a substrate and filling the via with a conductive material, such as copper. The TSVs may be used to provide an electrical contact on a backside of the semiconductor substrate to semiconductor circuitry on an opposing side of the substrate or another die. In this manner, dies may be stacked while maintaining a smaller package size.
The conductive material of the TSV, however, may exhibit a tendency to delaminate from the sidewalls of the TSVs or slide during high-low temperature cycles or thermal shock tests, thereby reducing the reliability of the TSVs. Furthermore, filling the via with a conductive material requires forming a barrier layer and/or a seed layer on the vertical sidewalls of the via. Due to the vertical nature of the sidewalls, however, it may be difficult to form a barrier layer and/or a seed layer with good adhesive properties and, as a result, difficult to fill the TSV.
Accordingly, there is a need for a TSV that reduces or prevents these issues.